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Home > Semiconductors > ICs > NSC DM74ALS273N Flip Flop D-Type Bus Interface Pos-E

NSC DM74ALS273N Flip Flop D-Type Bus Interface Pos-E

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DM74ALS273N NSC ALS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20

NSC DM74ALS273N Flip Flop D-Type Bus Interface Pos-E

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DM74ALS273N TI - NSC 74ALS273N Flip Flop D-Type Bus Interface Pos-Edge Single 20-Pin PDIPDescription

  • 74ALS TTL, 74ALS273, DIP20, 5V
  • Frequency:35MHz
  • Logic IC Case Style:DIP
  • No. of Pins:20
  • Operating Temperature Range:0°C to +70°C
  • SVHC:Cobalt dichloride (18-Jun-2010)
  • Case Style:DIP
  • Base Number:74
  • IC Generic Number:74ALS273
  • IC Temperature Range:Commercial
  • Logic Function Number:273
  • Logic IC Base Number:74273
  • Logic IC Family:ALS
  • Logic IC Function:Octal D-Type Flip-Flop With Reset
  • Positive-Edge Trigger
  • Max Operating Temperature:70°C
  • Max Supply Voltage:5.5V
  • Min Supply Voltage:4.5V
  • Min Temperature Operating:0°C
  • No. of Gates:8
  • No. of Inputs:1
  • SVHC (Secondary):Bis (2-ethyl(hexyl)phthalate) (DEHP) (18-Jun-2010)
  • Supply Voltage:5V
  • Termination Type:Through Hole

The 74ALS273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR ) inputs load and reset all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. All outputs will be forced Low independently of clock or data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the CP and MR are common to all flip-flops.

Additional Information

DM74ALS273N
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