The MS81V10160 is a 10Mb FIFO (First-In First-Out) memory designed for 664,320-words × 16-bit high-speed asynchronous read/write operation. The MS81V10160 is best suited for a field memory for digital TVs or LCD panels which require high-speed, large memory , and is not designed for high end use in professional graphics systems, which require long term picture storage and data storage. The MS81V10160 is provided with independent control clocks to support asynchronous read and write operations. Different clock rates are also supported, which allow alternate data rates between write and read data streams. The first data read operation can be performed after 1600 ns + 4 cycles from read reset and the first data write operation is enabled after 1600 ns + 4 cycles from write reset. Thereafter, the high-speed read/write operation is possible every cycle time. Additionally, a write mask function by IE pin and a read-data skipping function by OE pin implement image data processing easily. The MS81V10160 provides high speed FIFO (First-in First-out) operation without external refreshing: MS81V10160 refreshes its DRAM storage cells automatically, so that it appears fully static to the users. Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial access operation, so that serial read and/or write control clock can be halted high or low for any duration as long as the power is on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration logic. The MS81V10160’s function is simple, and similar to a digital delay device whose delay-bit- length is easily set by reset timing. The delay length and the number of read delay clocks between write and read, is determined by externally controlled write and read reset timings. The MS81V10160 uses a thin and small 70-pin plastic TSOP.